As the number of cache memories in a complex system increases, so too does the latency associated with checking the cache memories for a valid, or most recent, copy of requested data. This is a result of a typically hierarchical memory structure, which requires that the request be transmitted through multiple layers of the memory structure.
For example, if a processor or a memory controller broadcasts a request for a copy of a block of data (e.g., a cache line), each cache memory in the system receives the request and checks for the requested data. Each cache memory must also respond to the source of the request. This request-response protocol can be very bandwidth intensive in complex systems.
One technique that has been used in these complex systems is a directory that tracks the location of the valid copy of the requested data. A single, centralized directory can be used. Use of a centralized directory quickly increases the complexity and bandwidth requirements for a system because every transaction must be reflected by the directory. Thus, the directory must be checked and/or updated for each request and each response even if the directory does not provide any relevant information related to the request or response. However, the centralized directory can become a bottleneck to performance as the complexity of the system increases because many devices must search the directory for each request for data.